<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Disaggregated-Serving on lo0 — Tech Blog</title><link>https://blog.lo0.es/en/tags/disaggregated-serving/</link><description>Recent content in Disaggregated-Serving on lo0 — Tech Blog</description><generator>Hugo -- gohugo.io</generator><language>en</language><lastBuildDate>Fri, 12 Jun 2026 05:00:00 +0200</lastBuildDate><atom:link href="https://blog.lo0.es/en/tags/disaggregated-serving/index.xml" rel="self" type="application/rss+xml"/><item><title>Long context and KV offloading: when the notebook does not fit on the desk</title><link>https://blog.lo0.es/en/posts/long-context-kv-offloading-notebook-desk/</link><pubDate>Fri, 12 Jun 2026 05:00:00 +0200</pubDate><guid>https://blog.lo0.es/en/posts/long-context-kv-offloading-notebook-desk/</guid><description>&lt;h2 id="tldr">TL;DR&lt;/h2>
&lt;p>Serving long context &lt;strong>is not serving a smarter model, it is managing a notebook that does not fit on the desk&lt;/strong>. The context window is set by the model (and extended with RoPE scaling / YaRN), but the cost of serving it is set by the &lt;strong>KV cache&lt;/strong>, which grows linearly with sequence length and, in production, &lt;strong>explodes&lt;/strong>: a 300k-token contract on Llama 3 70B eats ~93 GB of KV, more than an entire H100, and a million tokens asks for ~125 GB. When the KV does not fit in HBM, there are only two ways out: &lt;strong>recompute&lt;/strong> (extremely expensive, attention is quadratic) or &lt;strong>offload&lt;/strong> the KV to a cheaper memory hierarchy: DRAM, NVMe, network. The 2026 OSS state of the art, &lt;strong>LMCache&lt;/strong>, &lt;strong>Mooncake&lt;/strong> (Kimi&amp;rsquo;s platform) and &lt;strong>NVIDIA Dynamo/KVBM&lt;/strong>, turns that offload into a &lt;strong>first-class KV layer&lt;/strong>, with reuse across requests, &lt;em>prefill/decode disaggregation&lt;/em> and cache-aware &lt;em>routing&lt;/em>. Reported results: &lt;strong>3×–10×&lt;/strong> less latency with LMCache and up to &lt;strong>+525 %&lt;/strong> throughput in long-context scenarios with Mooncake. The price: every memory hop adds transfer latency, so offloading &lt;strong>only pays off when what you save by not recomputing beats what it costs to move the bytes&lt;/strong>.&lt;/p>
&lt;hr>
&lt;h2 id="the-analogy">The analogy&lt;/h2>
&lt;p>A researcher works at a small desk. On it fit the papers they are pulling from &lt;strong>right now&lt;/strong>, which is the GPU&amp;rsquo;s HBM, blazingly fast but tiny. When the case is long (a thousand-page file, a million-token context), the papers do not fit. There are three options:&lt;/p>
&lt;ol>
&lt;li>&lt;strong>Throw papers away and ask the archive for them again every time they are needed.&lt;/strong> That is recomputing the KV: correct, but agonisingly slow, because &amp;ldquo;asking the archive&amp;rdquo; in an LLM means running the whole prompt through attention again, and attention is &lt;strong>quadratic&lt;/strong>.&lt;/li>
&lt;li>&lt;strong>Put a shelf next to the desk&lt;/strong> (the CPU&amp;rsquo;s DRAM) and, further out, &lt;strong>a store room in the basement&lt;/strong> (NVMe) and &lt;strong>a depot in another building&lt;/strong> (network/object). Moving papers between the desk and the shelf costs seconds, not hours. That is &lt;strong>hierarchical KV offloading&lt;/strong>.&lt;/li>
&lt;li>&lt;strong>Have two researchers split the work:&lt;/strong> one reads and marks up the whole file (prefill), then passes their notes to the second, who only drafts (decode). That is the &lt;strong>KVCache-centric disaggregated architecture&lt;/strong>.&lt;/li>
&lt;/ol>
&lt;p>This post is about options 2 and 3, the ones that make long context viable in production. Option 1 is what you pay by default if you do nothing.&lt;/p>
&lt;hr>
&lt;h2 id="part-1--why-long-context-is-a-memory-problem">Part 1 · Why long context is a memory problem&lt;/h2>
&lt;h3 id="the-kv-cache-grows-with-the-sequence">The KV cache grows with the sequence&lt;/h3>
&lt;p>For every token that goes in or out, the model stores its &lt;em>key&lt;/em> and &lt;em>value&lt;/em> vectors in each layer so it does not have to recompute them. The size is:&lt;/p>
$$\text{KV bytes} = 2 \times L \times h_{kv} \times d_{head} \times s \times b$$
&lt;p>with \(L\) layers, \(h_{kv}\) KV heads (few, with GQA), \(d_{head}\) the per-head dimension, \(s\) the sequence length and \(b\) the bytes per element. Everything is a model constant &lt;strong>except \(s\)&lt;/strong>: the KV is &lt;strong>linear in context length&lt;/strong>. Doubling the context doubles the KV. That is the basis of &lt;a href="https://blog.lo0.es/en/posts/kv-cache-working-memory-llm-inference/">KV cache: the working memory of inference&lt;/a>.&lt;/p>
&lt;h3 id="the-numbers-are-frightening">The numbers are frightening&lt;/h3>
&lt;p>At production scale, that linear term turns brutal:&lt;/p>
&lt;ul>
&lt;li>A &lt;strong>300k-token contract&lt;/strong> on &lt;strong>Llama 3 70B&lt;/strong> consumes &lt;strong>~93 GB&lt;/strong> of KV alone, &lt;strong>more than the 80 GB of an entire H100&lt;/strong> (&lt;a href="https://www.digitalocean.com/community/tutorials/long-context-inference-production-cost">DigitalOcean · Long-Context Inference Cost&lt;/a>).&lt;/li>
&lt;li>A &lt;strong>1M-token context&lt;/strong> needs &lt;strong>~125 GB&lt;/strong> of KV, which exceeds both an RTX 4090 (24 GB) and an 80 GB A100 (&lt;a href="https://introl.com/blog/long-context-llm-infrastructure-million-token-windows-guide">Introl · Long-Context LLM Infrastructure&lt;/a>).&lt;/li>
&lt;li>Even a &lt;strong>7B at 128k&lt;/strong> climbs to &lt;strong>~14 GB&lt;/strong> of KV (against ~6 GB at 4k).&lt;/li>
&lt;/ul>
&lt;p>The KV stops being an implementation detail and becomes &lt;strong>the resource that dictates your concurrency&lt;/strong>.&lt;/p>
&lt;h3 id="and-on-top-of-that-attention-is-quadratic">And on top of that, attention is quadratic&lt;/h3>
&lt;p>The KV is linear, but the &lt;strong>compute of attention is quadratic&lt;/strong> in length. When the prompt reaches 1M tokens, generating each token can take on the order of &lt;strong>1.765 seconds, with more than 96 % of the latency spent in attention&lt;/strong> (&lt;a href="https://introl.com/blog/long-context-llm-infrastructure-million-token-windows-guide">Introl&lt;/a>). The aggregate effect is a &lt;strong>throughput collapse of 10×–100×&lt;/strong> against short contexts. This is why long context is not &amp;ldquo;fixed&amp;rdquo; with more VRAM alone: there is a memory problem (KV) &lt;strong>and&lt;/strong> a compute problem (attention) at the same time.&lt;/p>
&lt;h3 id="extending-the-window--serving-it-cheaply">Extending the window ≠ serving it cheaply&lt;/h3>
&lt;p>A common confusion: &amp;ldquo;my model supports 1M of context&amp;rdquo; does not mean &amp;ldquo;I can serve 1M cheaply&amp;rdquo;. The window is &lt;strong>extended&lt;/strong> with &lt;em>RoPE scaling&lt;/em> techniques such as &lt;strong>YaRN&lt;/strong>, the practical option for &lt;em>fine-tuning&lt;/em> open source models to long context: it needs &lt;strong>10× fewer training tokens and 2.5× fewer steps&lt;/strong> than naive RoPE interpolation, and it took LLaMA-2 from 4k to 32k and 128k (&lt;a href="https://arxiv.org/html/2402.13753v1">YaRN/LongRoPE&lt;/a>). But that solves the model &lt;strong>attending&lt;/strong> to long context, not the KV &lt;strong>fitting on your GPU&lt;/strong>. According to the 2026 round-ups, May 2026 marked the first generation of open &lt;strong>million-token&lt;/strong> models (with families supporting 256k extensible to 1M via YaRN) (&lt;a href="https://letsdatascience.com/blog/long-context-models-working-with-1m-token-windows">letsdatascience&lt;/a>). Treat it as a trend, not a closed spec, and verify capabilities per concrete model.&lt;/p>
&lt;hr>
&lt;h2 id="part-2--the-kv-memory-hierarchy">Part 2 · The KV memory hierarchy&lt;/h2>
&lt;p>The core idea of offloading is old in systems: &lt;strong>hierarchical caching&lt;/strong>. &amp;ldquo;Hot&amp;rdquo; KV (what is in use) lives in HBM; &amp;ldquo;warm&amp;rdquo; KV drops to DRAM; &amp;ldquo;cold&amp;rdquo; KV to NVMe; &amp;ldquo;shared across nodes&amp;rdquo; to network or object storage. Every hop multiplies capacity and divides bandwidth.&lt;/p>
&lt;div class="diagram" style="max-width:780px;margin:1rem auto;">
&lt;svg viewBox="0 0 780 300" role="img" aria-label="KV cache memory hierarchy: HBM, DRAM, NVMe and network/object, with increasing capacity and decreasing bandwidth" xmlns="http://www.w3.org/2000/svg">
&lt;style>.bx{fill:none;stroke:currentColor;stroke-width:1.3}.tl{font:600 13px sans-serif;fill:currentColor}.ts{font:11px sans-serif;fill:currentColor}.ar{fill:none;stroke:currentColor;stroke-width:1.2;stroke-dasharray:4 3;marker-end:url(#kvm)}&lt;/style>
&lt;defs>&lt;marker id="kvm" viewBox="0 0 10 10" refX="9" refY="5" markerWidth="7" markerHeight="7" orient="auto">&lt;path d="M0,0 L10,5 L0,10 z" fill="currentColor"/>&lt;/marker>&lt;/defs>
&lt;text x="20" y="26" class="tl">Hot · fast · small&lt;/text>
&lt;rect class="bx" x="20" y="36" width="430" height="44" rx="6"/>
&lt;text x="34" y="55" class="tl">GPU HBM&lt;/text>
&lt;text x="34" y="72" class="ts">~80 GB · several TB/s · the active KV lives here&lt;/text>
&lt;rect class="bx" x="20" y="92" width="500" height="44" rx="6"/>
&lt;text x="34" y="111" class="tl">CPU DRAM&lt;/text>
&lt;text x="34" y="128" class="ts">hundreds of GB–TB · tens–hundreds GB/s · warm KV, reuse across requests&lt;/text>
&lt;rect class="bx" x="20" y="148" width="570" height="44" rx="6"/>
&lt;text x="34" y="167" class="tl">NVMe SSD (local)&lt;/text>
&lt;text x="34" y="184" class="ts">TB · GB/s · cold KV, persistent prefixes, long sessions&lt;/text>
&lt;rect class="bx" x="20" y="204" width="640" height="44" rx="6"/>
&lt;text x="34" y="223" class="tl">Network / object (RDMA, S3, Redis)&lt;/text>
&lt;text x="34" y="240" class="ts">~unlimited · hundreds MB–GB/s · KV shared across cluster nodes&lt;/text>
&lt;path class="ar" d="M690,58 L690,226"/>
&lt;text x="700" y="120" class="ts" transform="rotate(90 700 120)">+capacity&lt;/text>
&lt;text x="700" y="200" class="ts" transform="rotate(90 700 200)">−bandwidth&lt;/text>
&lt;text x="20" y="276" class="ts">KV drops a level as it cools. Fetching it back from a lower level costs a transfer,&lt;/text>
&lt;text x="20" y="292" class="ts">but it is ALWAYS cheaper than recomputing it (quadratic attention) if the prefix is reused.&lt;/text>
&lt;/svg>
&lt;/div>
&lt;h3 id="working-out-when-offloading-pays-off">Working out when offloading pays off&lt;/h3>
&lt;p>Offloading is not magic: moving KV from DRAM/NVMe back to HBM costs time. The rule is simple. &lt;strong>Offloading pays off when the cost of recomputing exceeds the cost of transferring&lt;/strong>:&lt;/p>
$$t_{recompute}(s) \;>\; t_{transfer} = \frac{\text{KV bytes}}{BW_{enlace}}$$
&lt;p>Since \(t_{recompute}\) grows with attention (quadratic) and \(t_{transfer}\) grows only with the size of the KV (linear) divided by the link bandwidth, &lt;strong>the longer the context, the more the balance tips in favour of offloading&lt;/strong>. That is why offloading is &lt;em>the&lt;/em> lever for long context: it is exactly where recomputing becomes unbearable. The LMCache documentation says it without hedging: offloading &lt;strong>only helps when the recomputation it avoids is larger than the overhead it introduces&lt;/strong> (&lt;a href="https://levelup.gitconnected.com/vllm-prefix-caching-vs-lmcache-benchmarking-kv-reuse-tradeoffs-944fbaf98b56">LMCache benchmark&lt;/a>).&lt;/p>
&lt;hr>
&lt;h2 id="part-3--kv-offloading-in-practice-oss">Part 3 · KV offloading in practice (OSS)&lt;/h2>
&lt;h3 id="the-limit-of-out-of-the-box-prefix-caching">The limit of out-of-the-box prefix caching&lt;/h3>
&lt;p>vLLM already caches prefixes in HBM (see &lt;a href="https://blog.lo0.es/en/posts/prefix-cache-hit-rate-engineering/">prefix cache: hit rate engineering&lt;/a> and &lt;a href="https://blog.lo0.es/en/posts/pagedattention-vllm-block-manager/">PagedAttention&lt;/a>). The problem: &lt;strong>it only lives in HBM&lt;/strong>, which is small. When the useful KV exceeds HBM, it is evicted and, on the next request, has to be recomputed. &lt;strong>There is no speedup even with prefix caching enabled&lt;/strong>, because the cache is no longer there (&lt;a href="https://levelup.gitconnected.com/vllm-prefix-caching-vs-lmcache-benchmarking-kv-reuse-tradeoffs-944fbaf98b56">vLLM vs LMCache benchmark&lt;/a>). Native prefix caching is necessary but &lt;strong>insufficient&lt;/strong> for long context.&lt;/p>
&lt;h3 id="lmcache-the-persistent-kv-layer">LMCache: the persistent KV layer&lt;/h3>
&lt;p>&lt;strong>LMCache&lt;/strong> adds persistent storage backends to vLLM&amp;rsquo;s prefix cache (and also supports SGLang and NVIDIA Dynamo as engines). It pulls the KV out of HBM and &lt;strong>shares it across engines and across queries&lt;/strong>, covering a &lt;strong>three-level hierarchy: GPU HBM, CPU DRAM and NVMe SSD&lt;/strong>, with additional backends for Redis/Valkey, Mooncake, InfiniStore, S3 and NIXL/GDS (&lt;a href="https://github.com/LMCache/LMCache">GitHub LMCache&lt;/a>, &lt;a href="https://arxiv.org/pdf/2510.09665">arXiv 2510.09665&lt;/a>). Because DRAM/NVMe hold &lt;strong>far more&lt;/strong> KV than HBM, the &lt;em>hit ratio&lt;/em> rises, and LMCache reports &lt;strong>3×–10× less latency&lt;/strong> combined with vLLM. Against vLLM&amp;rsquo;s basic CPU offload, LMCache loads the KV &lt;strong>at chunk level with high-performance CUDA kernels&lt;/strong>, which cuts transfer overhead.&lt;/p>
&lt;p>A minimal start, offloading to CPU:&lt;/p>
&lt;div class="highlight">&lt;pre tabindex="0" class="chroma">&lt;code class="language-bash" data-lang="bash">&lt;span class="line">&lt;span class="cl">&lt;span class="c1"># vLLM with LMCache as the KV layer (offload to DRAM)&lt;/span>
&lt;/span>&lt;/span>&lt;span class="line">&lt;span class="cl">pip install lmcache
&lt;/span>&lt;/span>&lt;span class="line">&lt;span class="cl">&lt;span class="nv">LMCACHE_CONFIG_FILE&lt;/span>&lt;span class="o">=&lt;/span>lmcache.yaml &lt;span class="se">\
&lt;/span>&lt;/span>&lt;/span>&lt;span class="line">&lt;span class="cl">&lt;span class="se">&lt;/span>vllm serve meta-llama/Llama-3.1-70B-Instruct &lt;span class="se">\
&lt;/span>&lt;/span>&lt;/span>&lt;span class="line">&lt;span class="cl">&lt;span class="se">&lt;/span> --tensor-parallel-size &lt;span class="m">4&lt;/span> &lt;span class="se">\
&lt;/span>&lt;/span>&lt;/span>&lt;span class="line">&lt;span class="cl">&lt;span class="se">&lt;/span> --kv-transfer-config &lt;span class="s1">&amp;#39;{&amp;#34;kv_connector&amp;#34;:&amp;#34;LMCacheConnector&amp;#34;,&amp;#34;kv_role&amp;#34;:&amp;#34;kv_both&amp;#34;}&amp;#39;&lt;/span>
&lt;/span>&lt;/span>&lt;/code>&lt;/pre>&lt;/div>&lt;div class="highlight">&lt;pre tabindex="0" class="chroma">&lt;code class="language-yaml" data-lang="yaml">&lt;span class="line">&lt;span class="cl">&lt;span class="c"># lmcache.yaml — hierarchy HBM -&amp;gt; DRAM -&amp;gt; NVMe&lt;/span>&lt;span class="w">
&lt;/span>&lt;/span>&lt;/span>&lt;span class="line">&lt;span class="cl">&lt;span class="w">&lt;/span>&lt;span class="nt">chunk_size&lt;/span>&lt;span class="p">:&lt;/span>&lt;span class="w"> &lt;/span>&lt;span class="m">256&lt;/span>&lt;span class="w">
&lt;/span>&lt;/span>&lt;/span>&lt;span class="line">&lt;span class="cl">&lt;span class="w">&lt;/span>&lt;span class="nt">local_cpu&lt;/span>&lt;span class="p">:&lt;/span>&lt;span class="w"> &lt;/span>&lt;span class="kc">true&lt;/span>&lt;span class="w"> &lt;/span>&lt;span class="c"># warm KV in DRAM&lt;/span>&lt;span class="w">
&lt;/span>&lt;/span>&lt;/span>&lt;span class="line">&lt;span class="cl">&lt;span class="w">&lt;/span>&lt;span class="nt">max_local_cpu_size&lt;/span>&lt;span class="p">:&lt;/span>&lt;span class="w"> &lt;/span>&lt;span class="m">200&lt;/span>&lt;span class="w"> &lt;/span>&lt;span class="c"># GB&lt;/span>&lt;span class="w">
&lt;/span>&lt;/span>&lt;/span>&lt;span class="line">&lt;span class="cl">&lt;span class="w">&lt;/span>&lt;span class="nt">local_disk&lt;/span>&lt;span class="p">:&lt;/span>&lt;span class="w"> &lt;/span>&lt;span class="s2">&amp;#34;file:///nvme/lmcache&amp;#34;&lt;/span>&lt;span class="w"> &lt;/span>&lt;span class="c"># cold KV on NVMe&lt;/span>&lt;span class="w">
&lt;/span>&lt;/span>&lt;/span>&lt;span class="line">&lt;span class="cl">&lt;span class="w">&lt;/span>&lt;span class="nt">max_local_disk_size&lt;/span>&lt;span class="p">:&lt;/span>&lt;span class="w"> &lt;/span>&lt;span class="m">2000&lt;/span>&lt;span class="w"> &lt;/span>&lt;span class="c"># GB&lt;/span>&lt;span class="w">
&lt;/span>&lt;/span>&lt;/span>&lt;/code>&lt;/pre>&lt;/div>&lt;p>Offloading to CPU adds moderate overhead but &lt;strong>retains a good part of the benefit&lt;/strong> against recomputing (&lt;a href="https://docs.lmcache.ai/getting_started/quickstart/offload_kv_cache.html">LMCache docs&lt;/a>). Mind the physical path: that HBM↔DRAM↔NVMe traffic goes over PCIe and across NUMA nodes. It is worth reading &lt;a href="https://blog.lo0.es/en/posts/pcie-topology-gpudirect-p2p-acs-security-guard/">PCIe topology, GPUDirect and ACS&lt;/a> and &lt;a href="https://blog.lo0.es/en/posts/numa-hugepages-cpu-isolation-gpu-waits-kernel/">NUMA, hugepages and CPU isolation&lt;/a>, because a badly wired offload can eat its own gain.&lt;/p>
&lt;h3 id="combine-it-with-fp8">Combine it with FP8&lt;/h3>
&lt;p>Offloading reduces &lt;strong>where&lt;/strong> the KV lives; quantization reduces &lt;strong>how much&lt;/strong> it weighs. They are orthogonal and they add up: KV in FP8 halves the size (see &lt;a href="https://blog.lo0.es/en/posts/fp8-end-to-end-enable-measure-quality-decide/">FP8 end-to-end&lt;/a>), which means half the bytes to transfer on every offload. In long context, &lt;strong>FP8 + offload&lt;/strong> is the default combination.&lt;/p>
&lt;hr>
&lt;h2 id="part-4--kvcache-centric--disaggregated-architecture">Part 4 · KVCache-centric / disaggregated architecture&lt;/h2>
&lt;p>The next level is not just offloading KV, but &lt;strong>redesigning serving around the KV&lt;/strong>.&lt;/p>
&lt;h3 id="mooncake-kimis-platform">Mooncake (Kimi&amp;rsquo;s platform)&lt;/h3>
&lt;p>&lt;strong>Mooncake&lt;/strong>, the serving platform behind &lt;strong>Kimi&lt;/strong> (Moonshot AI), is the reference &lt;strong>KVCache-centric disaggregated&lt;/strong> architecture: it separates the &lt;strong>prefill&lt;/strong> and &lt;strong>decode&lt;/strong> clusters, and exploits the &lt;strong>underused CPU, DRAM and SSD resources&lt;/strong> of the GPU cluster to build a distributed KV cache. Its core is a &lt;strong>KVCache-centric scheduler&lt;/strong> that maximises throughput while respecting SLOs, with a &lt;strong>prediction-based early rejection policy&lt;/strong> for overloaded scenarios (&lt;a href="https://arxiv.org/abs/2407.00079">arXiv 2407.00079&lt;/a>, &lt;a href="https://www.usenix.org/conference/fast25/presentation/qin">USENIX FAST'25&lt;/a>). The long-context numbers are striking: up to &lt;strong>+525 % throughput&lt;/strong> in certain simulated scenarios while respecting the SLO, and in production Kimi handles &lt;strong>115 % and 107 % more requests&lt;/strong> on A800 and H800 clusters respectively against previous systems. The title of their FAST talk sums it up: &lt;em>&amp;ldquo;Trading More Storage for Less Computation&amp;rdquo;&lt;/em>, exactly the rule from Part 2.&lt;/p>
&lt;h3 id="nvidia-dynamo-and-kvbm">NVIDIA Dynamo and KVBM&lt;/h3>
&lt;p>&lt;strong>NVIDIA Dynamo&lt;/strong> is the open source distributed serving framework with &lt;strong>prefill/decode disaggregation&lt;/strong>, dynamic GPU scheduling and &lt;strong>KV-aware routing&lt;/strong>: the &lt;em>PrefillRouter&lt;/em> computes &lt;strong>overlap scores&lt;/strong> between the incoming request and the KV blocks already cached, and routes to the GPUs that &lt;strong>already have&lt;/strong> the relevant KV, avoiding recomputation (&lt;a href="https://docs.dynamo.nvidia.com/dynamo/design-docs/disaggregated-serving">Dynamo · Disaggregated Serving&lt;/a>, &lt;a href="https://docs.nvidia.com/dynamo/latest/user-guides/kv-cache-aware-routing">Dynamo · KV-aware routing&lt;/a>). KV transfer between prefill and decode is handled by &lt;strong>NIXL&lt;/strong> directly GPU-to-GPU over the best available transport (NVLink, InfiniBand). And its offload manager, &lt;strong>KVBM (KV Block Manager)&lt;/strong>, has a three-layer architecture (LLM runtime, logical block management, NIXL transport) that &lt;strong>offloads cold KV to CPU RAM, NVMe or network storage&lt;/strong> to free up HBM (&lt;a href="https://docs.nvidia.com/dynamo/backends/v-llm/kv-cache-offloading">Dynamo · KV Cache Offloading&lt;/a>). This connects with &lt;a href="https://blog.lo0.es/en/posts/disaggregated-serving-prefill-decode-specialised-pods/">disaggregated serving: prefill and decode in specialised pods&lt;/a>.&lt;/p>
&lt;p>The &lt;strong>llm-d&lt;/strong> project walks the same road, from vLLM&amp;rsquo;s prefix caching to KV-aware distributed scheduling (&lt;a href="https://llm-d.ai/blog/kvcache-wins-you-can-see">llm-d · KV-Cache Wins You Can See&lt;/a>).&lt;/p>
&lt;div class="diagram" style="max-width:780px;margin:1rem auto;">
&lt;svg viewBox="0 0 780 250" role="img" aria-label="KVCache-centric disaggregated architecture: KV-aware router, prefill cluster, tiered distributed KV cache and decode cluster" xmlns="http://www.w3.org/2000/svg">
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&lt;rect class="bx" x="20" y="40" width="120" height="46" rx="6"/>
&lt;text x="32" y="60" class="tl">KV-aware router&lt;/text>
&lt;text x="32" y="77" class="ts">overlap score&lt;/text>
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&lt;rect class="bx" x="185" y="40" width="150" height="46" rx="6"/>
&lt;text x="197" y="60" class="tl">PREFILL cluster&lt;/text>
&lt;text x="197" y="77" class="ts">reads+marks up context&lt;/text>
&lt;path class="ar" d="M260,86 L260,120"/>
&lt;rect class="dsh" x="120" y="120" width="430" height="50" rx="6"/>
&lt;text x="134" y="140" class="tl">Distributed KV cache (HBM · DRAM · NVMe · network)&lt;/text>
&lt;text x="134" y="158" class="ts">KVBM / LMCache / Mooncake store · reuse across requests and nodes&lt;/text>
&lt;path class="ar" d="M410,120 L410,86"/>
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&lt;text x="442" y="60" class="tl">DECODE cluster&lt;/text>
&lt;text x="442" y="77" class="ts">only generates tokens&lt;/text>
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&lt;text x="20" y="200" class="ts">KV stops being a by-product of decode and becomes the first-class citizen: the router routes by&lt;/text>
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&lt;text x="20" y="232" class="ts">It is "trading storage for computation": you store more KV so you compute less attention.&lt;/text>
&lt;/svg>
&lt;/div>
&lt;hr>
&lt;h2 id="part-5--reference-architecture">Part 5 · Reference architecture&lt;/h2>
&lt;p>On the blog&amp;rsquo;s example cluster, a node with &lt;strong>4×H100 SXM (80 GB, NVLink)&lt;/strong>, &lt;strong>local NVMe&lt;/strong> and plenty of DRAM, a sensible stack to serve long context without recomputing pointlessly:&lt;/p>
&lt;ol>
&lt;li>&lt;strong>KV in FP8&lt;/strong> in the engine (vLLM), to start with half the bytes.&lt;/li>
&lt;li>&lt;strong>LMCache as the KV layer&lt;/strong> with a DRAM→NVMe hierarchy, so that long prefixes (a manual, a code base, a case file) &lt;strong>are cached once and reused&lt;/strong> across sessions without recomputation.&lt;/li>
&lt;li>&lt;strong>KV-aware routing&lt;/strong> (Dynamo or llm-d) if you have several nodes: send the request to the GPU that already holds the prefix, not to any GPU at all.&lt;/li>
&lt;li>&lt;strong>Prefill/decode disaggregation&lt;/strong> once the prefill of enormous contexts starts stealing decode from the other requests. Prefilling 300k tokens monopolises the GPU and kills everyone&amp;rsquo;s latency.&lt;/li>
&lt;li>&lt;strong>Metrics&lt;/strong> for KV &lt;em>hit ratio&lt;/em>, bytes transferred per level and prefill/decode ratio, exported to your observability stack (&lt;a href="https://blog.lo0.es/en/posts/instrumenting-vllm-otel-measuring-optimisations/">instrumenting vLLM with OTel&lt;/a>). Without those three metrics, offloading is faith, not engineering.&lt;/li>
&lt;/ol>
&lt;p>To &lt;strong>prototype&lt;/strong> the stack, validating the LMCache config, the backend formats, the hit/miss behaviour, an &lt;strong>RTX 5090 (Blackwell, 32 GB)&lt;/strong> with NVMe is more than enough to serve a 7–14B and watch offloading work at contexts of 32–128k. Do not expect to serve 1M on a consumer card: the long-context problem is precisely that neither the KV nor the attention fit on small hardware. Real sizing starts from the SLO and from the context-length distribution of your traffic, not from the model&amp;rsquo;s maximum window, and that is where it links to &lt;a href="https://blog.lo0.es/en/posts/capacity-planning-on-premise-llm-inference/">capacity planning&lt;/a>.&lt;/p>
&lt;hr>
&lt;h2 id="part-6--operational-pitfalls-and-honest-scepticism">Part 6 · Operational pitfalls (and honest scepticism)&lt;/h2>
&lt;ol>
&lt;li>&lt;strong>Believing that native prefix caching is enough.&lt;/strong> It only lives in HBM; in long context it is evicted and you recompute. You need a persistent layer (LMCache/KVBM) for the cache to survive.&lt;/li>
&lt;li>&lt;strong>Offloading without measuring the break-even.&lt;/strong> If your prefixes &lt;strong>are not reused&lt;/strong>, offloading only adds transfer latency without saving recomputation. Offloading shines with &lt;strong>shared prefixes&lt;/strong> (RAG over the same corpus, agents with the same system prompt, long sessions), not with one-off, never-repeated requests.&lt;/li>
&lt;li>&lt;strong>Forgetting that attention is still quadratic.&lt;/strong> Offloading fixes the &lt;strong>memory&lt;/strong> of the KV, not the &lt;strong>compute&lt;/strong> of attention. For real 1M tokens you also need efficient attention, &lt;em>sparse attention&lt;/em> or retrieval approaches (RetrievalAttention, ShadowKV); offloading on its own does not bring down the 1.765 s/token.&lt;/li>
&lt;li>&lt;strong>Wiring the offload badly.&lt;/strong> HBM↔DRAM↔NVMe crosses PCIe and NUMA. An offload that crosses the wrong NUMA node or saturates a PCIe lane can be &lt;strong>slower than recomputing&lt;/strong>. Measure the link&amp;rsquo;s real bandwidth, not the datasheet figure.&lt;/li>
&lt;li>&lt;strong>Treating the figures as constants.&lt;/strong> The 93 GB, the +525 %, the 3–10× all depend on model, length, hardware and reuse pattern. They are &lt;strong>orders of magnitude for design&lt;/strong>; measure on your own load.&lt;/li>
&lt;li>&lt;strong>Trusting million-token model specs without verifying.&lt;/strong> The landscape of open 1M models is very recent (2026) and moves fast; the specific names and limits change between versions. Verify the window &lt;strong>and the cost of serving it&lt;/strong> per model, do not take the headline on trust.&lt;/li>
&lt;/ol>
&lt;p>A note of caution for June 2026: the distributed KV layer (LMCache, Mooncake, KVBM, NIXL, llm-d) is &lt;strong>setting right now&lt;/strong>, with APIs and backends that change release by release. It is exactly the kind of piece worth assembling behind an abstraction (vLLM&amp;rsquo;s &lt;em>kv_connector&lt;/em>) rather than coupling to a single vendor.&lt;/p>
&lt;hr>
&lt;h2 id="closing">Closing&lt;/h2>
&lt;p>Long context is a problem of &lt;strong>memory and compute at the same time&lt;/strong>, and the KV cache is the bottleneck of both. The window is a gift from the model; serving it cheaply is systems engineering: &lt;strong>quantise the KV (FP8), offload it by tiers (HBM→DRAM→NVMe→network) with a persistent layer, and reorganise serving around the KV&lt;/strong> (aware routing, separated prefill/decode) when scale demands it. The rule that governs it all is Mooncake&amp;rsquo;s: &lt;strong>trade storage for computation&lt;/strong>. You store more KV in cheap places so you do not recompute expensive attention. Do it well and a 4×H100 node serves contexts that, by recomputing, would not even get started. Do it badly, or not at all, and every long request reads the whole case file from scratch again, while the GPU drowns in a quadratic attention you had already paid for once.&lt;/p>
&lt;h2 id="sources">Sources&lt;/h2>
&lt;ul>
&lt;li>LMCache · GitHub — &lt;a href="https://github.com/LMCache/LMCache">https://github.com/LMCache/LMCache&lt;/a>&lt;/li>
&lt;li>LMCache: An Efficient KV Cache Layer (arXiv 2510.09665) — &lt;a href="https://arxiv.org/pdf/2510.09665">https://arxiv.org/pdf/2510.09665&lt;/a>&lt;/li>
&lt;li>LMCache · Offload KV cache to CPU (docs) — &lt;a href="https://docs.lmcache.ai/getting_started/quickstart/offload_kv_cache.html">https://docs.lmcache.ai/getting_started/quickstart/offload_kv_cache.html&lt;/a>&lt;/li>
&lt;li>vLLM Prefix Caching vs. LMCache: Benchmarking KV Reuse Tradeoffs — &lt;a href="https://levelup.gitconnected.com/vllm-prefix-caching-vs-lmcache-benchmarking-kv-reuse-tradeoffs-944fbaf98b56">https://levelup.gitconnected.com/vllm-prefix-caching-vs-lmcache-benchmarking-kv-reuse-tradeoffs-944fbaf98b56&lt;/a>&lt;/li>
&lt;li>Mooncake: A KVCache-centric Disaggregated Architecture (arXiv 2407.00079) — &lt;a href="https://arxiv.org/abs/2407.00079">https://arxiv.org/abs/2407.00079&lt;/a>&lt;/li>
&lt;li>Mooncake · USENIX FAST'25 (Trading More Storage for Less Computation) — &lt;a href="https://www.usenix.org/conference/fast25/presentation/qin">https://www.usenix.org/conference/fast25/presentation/qin&lt;/a>&lt;/li>
&lt;li>Mooncake · GitHub — &lt;a href="https://github.com/kvcache-ai/Mooncake/">https://github.com/kvcache-ai/Mooncake/&lt;/a>&lt;/li>
&lt;li>NVIDIA Dynamo · Disaggregated Serving (docs) — &lt;a href="https://docs.dynamo.nvidia.com/dynamo/design-docs/disaggregated-serving">https://docs.dynamo.nvidia.com/dynamo/design-docs/disaggregated-serving&lt;/a>&lt;/li>
&lt;li>NVIDIA Dynamo · KV-aware routing (docs) — &lt;a href="https://docs.nvidia.com/dynamo/latest/user-guides/kv-cache-aware-routing">https://docs.nvidia.com/dynamo/latest/user-guides/kv-cache-aware-routing&lt;/a>&lt;/li>
&lt;li>NVIDIA Dynamo · KV Cache Offloading / KVBM (docs) — &lt;a href="https://docs.nvidia.com/dynamo/backends/v-llm/kv-cache-offloading">https://docs.nvidia.com/dynamo/backends/v-llm/kv-cache-offloading&lt;/a>&lt;/li>
&lt;li>llm-d · KV-Cache Wins You Can See — &lt;a href="https://llm-d.ai/blog/kvcache-wins-you-can-see">https://llm-d.ai/blog/kvcache-wins-you-can-see&lt;/a>&lt;/li>
&lt;li>Long-Context Inference at Scale: The Hidden Infrastructure Cost · DigitalOcean — &lt;a href="https://www.digitalocean.com/community/tutorials/long-context-inference-production-cost">https://www.digitalocean.com/community/tutorials/long-context-inference-production-cost&lt;/a>&lt;/li>
&lt;li>Long-Context LLM Infrastructure · Introl — &lt;a href="https://introl.com/blog/long-context-llm-infrastructure-million-token-windows-guide">https://introl.com/blog/long-context-llm-infrastructure-million-token-windows-guide&lt;/a>&lt;/li>
&lt;li>YaRN / LongRoPE (arXiv 2402.13753) — &lt;a href="https://arxiv.org/html/2402.13753v1">https://arxiv.org/html/2402.13753v1&lt;/a>&lt;/li>
&lt;/ul></description></item><item><title>Disaggregated serving: prefill and decode in specialised pods</title><link>https://blog.lo0.es/en/posts/disaggregated-serving-prefill-decode-specialised-pods/</link><pubDate>Fri, 22 May 2026 01:00:00 +0200</pubDate><guid>https://blog.lo0.es/en/posts/disaggregated-serving-prefill-decode-specialised-pods/</guid><description>&lt;h2 id="tldr">TL;DR&lt;/h2>
&lt;p>LLM inference has two phases with opposite profiles: &lt;strong>prefill&lt;/strong> (processing the whole prompt in one go) is compute-bound, &lt;strong>decode&lt;/strong> (generating token by token) is memory-bandwidth-bound. Running them on the same GPU forces a choice between two incompatible optimal hardware profiles, and leaves between 60 % and 80 % of peak capacity unused. The industry consolidated the pattern in 2026: &lt;strong>disaggregated serving&lt;/strong>, separate pods for each phase, connected by a KV cache transfer channel (NIXL over UCX, RDMA, or NCCL as a fallback). DistServe demonstrated 7.4× more request rate at the same SLO; NVIDIA Dynamo 1.0 (GA at GTC 2026) takes the pattern to production at datacenter scale. Mixing heterogeneous hardware, H100 for prefill and commodity GPUs for decode, cuts up to 48 % off the cost per token. This article explains the why, the how, and the numbers that matter for a typical on-premise infrastructure.&lt;/p>
&lt;h2 id="you-are-here-deploy">You are here: Deploy&lt;/h2>
&lt;p>Disaggregated serving is an architectural decision in the &lt;strong>Deploy&lt;/strong> stage of the &lt;a href="https://blog.lo0.es/en/posts/six-stage-llmops-pipeline-architecture-and-deep-dive/">six-stage LLMOps pipeline&lt;/a>. It does not change the model, it does not change the data, it does not change the evals. It only changes &lt;strong>how inference pods are spread over the GPU hardware&lt;/strong>. But that change moves aggregate throughput between 2× and 7×.&lt;/p>
&lt;div class="diagram" style="max-width:780px;margin:1rem auto;">
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&lt;h2 id="the-analogy-the-kitchen-with-two-brigades">The analogy: the kitchen with two brigades&lt;/h2>
&lt;p>A serious industrial kitchen, any kitchen serving more than 50 covers a night, runs with two distinct brigades and two physically separate spaces.&lt;/p>
&lt;p>The &lt;strong>prep brigade&lt;/strong> starts at dawn. Its job is the &lt;em>mise en place&lt;/em>: chopping, marinating, blanching, boiling stocks, preparing complex components. Equipment: good knives, big burners, convection ovens, 40-litre pots. It is capacity-intensive work and it is done in one batch. When it finishes, everything is left in labelled trays ready to use.&lt;/p>
&lt;p>The &lt;strong>service brigade&lt;/strong> comes in mid-afternoon. Its job is service: taking the trays from prep, heating portions, plating, running the pass. Equipment: salamanders, small griddles, thin spatulas, plenty of crockery. It is wrist work, rhythm work, not-failing-the-customer-who-has-the-plate-in-front-of-them work. Capacity per hour matters less than latency per plate.&lt;/p>
&lt;p>If you make &lt;strong>the same person&lt;/strong> do prep and service, both suffer. The cook is idle while doing mise en place in the middle of the afternoon. They have to stop and plate up when five orders land at once. Their working kit is designed for one or the other, not for both.&lt;/p>
&lt;p>Serious kitchens solved this decades ago: separate brigades, separate spaces, separate equipment. The only thing that crosses between them is the trays of mise en place.&lt;/p>
&lt;p>The &lt;strong>trays are the KV cache&lt;/strong>. The separation is &lt;strong>disaggregated serving&lt;/strong>. The handover from prep to service is the &lt;strong>KV cache transfer&lt;/strong>, solved today with NIXL over RDMA. And the specialised pods are the two brigades with their optimal kit.&lt;/p>
&lt;h2 id="quick-recap-prefill-and-decode">Quick recap: prefill and decode&lt;/h2>
&lt;p>A request to an LLM always goes through two phases:&lt;/p>
&lt;p>&lt;strong>Prefill.&lt;/strong> Take the complete prompt (say, 4,000 tokens) and process it in a single pass through all the layers of the model. The result is the KV cache of those 4,000 tokens (see the &lt;a href="https://blog.lo0.es/en/posts/kv-cache-working-memory-llm-inference/">previous article on KV cache&lt;/a> if you want to recall exactly what it holds). This step is massively parallel: all the tokens go through the attention matrices at once, which translates into huge, dense matrix multiplications. The GPU sits at 90-95 % compute utilisation. &lt;strong>TTFT&lt;/strong> (time to first token) is determined by this phase.&lt;/p>
&lt;p>&lt;strong>Decode.&lt;/strong> Once the KV cache is ready, the model generates tokens one by one. Each new token is a pass through all the layers with a single query vector, reading the whole accumulated KV cache to compute attention. There is no parallelism between tokens (each one depends on the previous). What limits you here is not compute but bandwidth: every step has to read the model&amp;rsquo;s full weights from HBM. The GPU sits at 20-40 % compute utilisation, but at 90 % HBM utilisation. &lt;strong>TBT&lt;/strong> (time between tokens) is determined by this phase.&lt;/p>
&lt;table>
&lt;thead>
&lt;tr>
&lt;th>Phase&lt;/th>
&lt;th>Characteristic&lt;/th>
&lt;th>Bottleneck&lt;/th>
&lt;th>Key metric&lt;/th>
&lt;/tr>
&lt;/thead>
&lt;tbody>
&lt;tr>
&lt;td>Prefill&lt;/td>
&lt;td>Massive parallel compute over N tokens at once&lt;/td>
&lt;td>TFLOPS (compute)&lt;/td>
&lt;td>TTFT&lt;/td>
&lt;/tr>
&lt;tr>
&lt;td>Decode&lt;/td>
&lt;td>Streaming weights from HBM, 1 token at a time&lt;/td>
&lt;td>HBM bandwidth&lt;/td>
&lt;td>TBT (inter-token latency)&lt;/td>
&lt;/tr>
&lt;/tbody>
&lt;/table>
&lt;div class="diagram" style="max-width: 720px; margin: 1.5rem auto;">
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&lt;text x="360" y="22" text-anchor="middle" class="lbl">GPU utilisation during each phase (typical order of magnitude)&lt;/text>
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&lt;p>The asymmetry is structural: prefill burns compute and leaves memory half idle, decode does the opposite. &lt;strong>A GPU designed to be excellent at both at once is a GPU designed to be badly used all the time.&lt;/strong>&lt;/p>
&lt;h2 id="why-putting-them-on-the-same-gpu-is-a-bad-deal">Why putting them on the same GPU is a bad deal&lt;/h2>
&lt;p>Until 2023, the universal assumption was to run prefill and decode &lt;strong>in the same inference process, on the same GPU&lt;/strong>. The engine scheduler (vLLM, TGI, Triton) decided on each cycle whether to prefill a new request or decode the ones already in flight. The intuition was that sharing hardware saves money.&lt;/p>
&lt;p>The intuition is wrong. The problem has three faces:&lt;/p>
&lt;p>&lt;strong>Latency interference.&lt;/strong> When the engine decides to prefill a new request, it &lt;strong>interrupts&lt;/strong> every decode in progress. That pushes up the TBT of the other requests. The user who was watching tokens flow smoothly down the screen notices a stall of several hundred milliseconds. This is known as &lt;em>prefill-decode interference&lt;/em> and it degrades the experience visibly as concurrency rises.&lt;/p>
&lt;p>&lt;strong>Sub-optimal hardware for each phase.&lt;/strong> An H100 SXM has 989 TFLOPS BF16 of compute and 3.35 TB/s of HBM3. It is excellent for prefill, where compute is the limit. For decode, where the only thing that matters is bandwidth, those 989 TFLOPS are 60-70 % wasted. Conversely, a GPU with less compute but similar relative bandwidth (RTX 4090, L40S) would handle decode just as well for a fraction of the price.&lt;/p>
&lt;p>&lt;strong>Low aggregate utilisation.&lt;/strong> In real workloads with Llama 3 70B and 512-token outputs, &lt;strong>around 80 % of the wall-clock is spent in decode&lt;/strong>. That means 80 % of your H100 cluster budget is doing memory reads, not calculations. It is like paying for a Ferrari to use it in a car park queue.&lt;/p>
&lt;h2 id="the-idea-specialised-pods-kv-cache-as-the-deliverable">The idea: specialised pods, KV cache as the deliverable&lt;/h2>
&lt;p>Disaggregated serving breaks the inference cycle into two distinct services:&lt;/p>
&lt;p>&lt;strong>Prefill pod.&lt;/strong> Receives the prompt, runs the prefill, produces the KV cache. Hardware: high-compute GPUs (H100, H200, B200). Optimised for aggressive batching and throughput, not for individual latency: if 32 prompts arrive within 100 ms, it processes them together.&lt;/p>
&lt;p>&lt;strong>Decode pod.&lt;/strong> Receives the already-built KV cache, runs the token-by-token generation, streams to the client. Hardware: GPUs with good bandwidth but ideally cheaper per TFLOPS (RTX 4090, L40S, A100, even A30 depending on the case). Optimised for per-token latency (low TBT).&lt;/p>
&lt;p>Between the two: a &lt;strong>KV cache transfer&lt;/strong> over the network, which can be node-local (shared memory, NVLink), intra-rack (RDMA with InfiniBand or RoCE) or cross-rack (NIXL over UCX). The cost of this transfer scales linearly with context length, and it is the economic crux of the scheme.&lt;/p>
&lt;div class="diagram" style="max-width: 720px; margin: 1.5rem auto;">
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&lt;/div>
&lt;h2 id="the-transfer-protocol-the-economics-of-movement">The transfer protocol: the economics of movement&lt;/h2>
&lt;p>The KV cache transferred for a Llama 3 70B with 4K of context weighs roughly &lt;strong>2.6 GB&lt;/strong> (80 layers × 8 KV heads × 128 dim × 4,096 tokens × 2 (K and V) × 2 bytes in BF16). Moving 2.6 GB between two GPUs is not trivial:&lt;/p>
&lt;table>
&lt;thead>
&lt;tr>
&lt;th>Channel&lt;/th>
&lt;th style="text-align:right">Effective bandwidth&lt;/th>
&lt;th style="text-align:right">Time for 2.6 GB&lt;/th>
&lt;/tr>
&lt;/thead>
&lt;tbody>
&lt;tr>
&lt;td>Intra-node NVLink (NVSwitch)&lt;/td>
&lt;td style="text-align:right">~450 GB/s&lt;/td>
&lt;td style="text-align:right">~6 ms&lt;/td>
&lt;/tr>
&lt;tr>
&lt;td>Shared memory (same node, PCIe 5)&lt;/td>
&lt;td style="text-align:right">~60 GB/s&lt;/td>
&lt;td style="text-align:right">~45 ms&lt;/td>
&lt;/tr>
&lt;tr>
&lt;td>RDMA InfiniBand 400 Gbps&lt;/td>
&lt;td style="text-align:right">~50 GB/s&lt;/td>
&lt;td style="text-align:right">~55 ms&lt;/td>
&lt;/tr>
&lt;tr>
&lt;td>RDMA RoCE 200 Gbps&lt;/td>
&lt;td style="text-align:right">~25 GB/s&lt;/td>
&lt;td style="text-align:right">~105 ms&lt;/td>
&lt;/tr>
&lt;tr>
&lt;td>TCP/IP 10 GbE&lt;/td>
&lt;td style="text-align:right">~1 GB/s&lt;/td>
&lt;td style="text-align:right">~2.6 s&lt;/td>
&lt;/tr>
&lt;/tbody>
&lt;/table>
&lt;p>The immediate reading: above InfiniBand grade, the transfer is comfortable. Below it, it ruins the very TTFT we are trying to improve. &lt;strong>Disaggregated serving is only viable with a decent interconnect.&lt;/strong> It is not a pattern for clusters built out of consumer Ethernet switches.&lt;/p>
&lt;p>NVIDIA answered this with &lt;strong>NIXL&lt;/strong> (NVIDIA Inference Transfer Library), released in mid-2025: a library that abstracts the transport (UCX, NCCL, direct RDMA verbs, shared memory) and picks the best available path automatically. vLLM has integrated it since late 2025 through the &lt;code>NixlConnector&lt;/code>. It is now the de facto default for new deployments.&lt;/p>
&lt;h2 id="real-implementations-in-may-2026">Real implementations in May 2026&lt;/h2>
&lt;p>The pattern&amp;rsquo;s path over two years:&lt;/p>
&lt;pre tabindex="0">&lt;code>2024 Jan · DistServe (HKU + UCSD): 7.4× requests at the same SLO
2024 May · SplitWise (Microsoft): variant with heterogeneous hardware
2024 Dec · experimental vLLM disagg (SharedStorage + PyNcclConnector)
2025 Mar · NIXL release (NVIDIA): unified transfer library
2025 Jul · stable vLLM NixlConnector
2025 Nov · SGLang, llm-d, MoonCake adopt the pattern
2026 Mar · NVIDIA Dynamo 1.0 GA (GTC 2026): production-ready at datacenter scale
&lt;/code>&lt;/pre>&lt;p>As of today, &lt;strong>the pattern is the default&lt;/strong> in any serious serving framework. The ones still monolithic are the small ones or the educational ones.&lt;/p>
&lt;p>Three realistic options for an on-premise infrastructure:&lt;/p>
&lt;ol>
&lt;li>&lt;strong>vLLM disagg with NixlConnector.&lt;/strong> The most open route, requiring two sets of vLLM pods to be deployed (one with &lt;code>--kv-transfer-config '{&amp;quot;kv_role&amp;quot;:&amp;quot;producer&amp;quot;}'&lt;/code>, another with &lt;code>&amp;quot;kv_role&amp;quot;:&amp;quot;consumer&amp;quot;&lt;/code>) plus a proxy router. Enough for clusters of 4-16 GPUs.&lt;/li>
&lt;li>&lt;strong>SGLang with disagg.&lt;/strong> Conceptually equivalent, better performance on some MoE workloads.&lt;/li>
&lt;li>&lt;strong>NVIDIA Dynamo 1.0.&lt;/strong> The one taking over at datacenter scale. It covers routing, KV cache management, monitoring and scheduling in a single control plane. Heavier, but the reference solution if your cluster grows beyond 32 GPUs.&lt;/li>
&lt;/ol>
&lt;h2 id="the-numbers-that-matter">The numbers that matter&lt;/h2>
&lt;p>What disaggregation unlocks, in direct terms:&lt;/p>
&lt;table>
&lt;thead>
&lt;tr>
&lt;th>Metric&lt;/th>
&lt;th>Aggregated (monolithic)&lt;/th>
&lt;th>Disaggregated&lt;/th>
&lt;th>Improvement&lt;/th>
&lt;/tr>
&lt;/thead>
&lt;tbody>
&lt;tr>
&lt;td>Goodput (req/s at the SLO)&lt;/td>
&lt;td>baseline&lt;/td>
&lt;td>1.4 – 2×&lt;/td>
&lt;td>up to 2×&lt;/td>
&lt;/tr>
&lt;tr>
&lt;td>TTFT under high load&lt;/td>
&lt;td>rises sharply from QPS 4&lt;/td>
&lt;td>stable up to QPS 7+&lt;/td>
&lt;td>~2×&lt;/td>
&lt;/tr>
&lt;tr>
&lt;td>Request rate at the same SLO (DistServe paper)&lt;/td>
&lt;td>baseline&lt;/td>
&lt;td>7.4×&lt;/td>
&lt;td>7.4×&lt;/td>
&lt;/tr>
&lt;tr>
&lt;td>MoE throughput on Blackwell (Dynamo, GB300 NVL72)&lt;/td>
&lt;td>baseline (Hopper)&lt;/td>
&lt;td>up to 50×&lt;/td>
&lt;td>depends on the model&lt;/td>
&lt;/tr>
&lt;tr>
&lt;td>Cost per token (heterogeneous H100 + commodity)&lt;/td>
&lt;td>baseline (all H100)&lt;/td>
&lt;td>-48 %&lt;/td>
&lt;td>almost half&lt;/td>
&lt;/tr>
&lt;/tbody>
&lt;/table>
&lt;p>These numbers have to be read carefully: the most spectacular ones (7× and 50×) need specific hardware (Blackwell GB200/GB300 NVL72) and specific models (large MoE). The &lt;strong>realistic range for a typical on-premise setup is 1.4-2× in goodput and -30 to -50 % in cost per token&lt;/strong>, depending on how heterogeneous the GPU mix is and how optimised the KV cache transfer is.&lt;/p>
&lt;h2 id="heterogeneity-the-radical-version">Heterogeneity: the radical version&lt;/h2>
&lt;p>The logical next step, proposed by SplitWise in 2024 and matured in 2025-2026 (Cronus, Tessera and others), is to &lt;strong>mix GPU types&lt;/strong>: expensive high-compute GPUs for prefill, commodity GPUs with good bandwidth for decode.&lt;/p>
&lt;p>Indicative cost (typical market prices in mid-2026):&lt;/p>
&lt;ul>
&lt;li>&lt;strong>H100 SXM&lt;/strong>: ~30-40 kUSD capex, ~3-4 USD/h amortised. Compute-heavy profile.&lt;/li>
&lt;li>&lt;strong>L40S&lt;/strong>: ~8-10 kUSD capex, ~1.5 USD/h. Intermediate profile, 864 GB/s of bandwidth.&lt;/li>
&lt;li>&lt;strong>RTX 4090&lt;/strong>: ~1.5 kUSD capex, ~0.30 USD/h. Modest compute profile but 1 TB/s of GDDR6X bandwidth, enough for decode of models up to ~30B parameters.&lt;/li>
&lt;/ul>
&lt;p>A realistic mixed cluster for serving an 8B model:&lt;/p>
&lt;pre tabindex="0">&lt;code>2× RTX 4090 (prefill batch) → ~3,000 USD capex, ~0.60 USD/h
4× RTX 4090 (decode pool) → ~6,000 USD capex, ~1.20 USD/h
TOTAL → ~9,000 USD capex, ~1.80 USD/h
&lt;/code>&lt;/pre>&lt;p>Against the monolithic alternative with equivalent throughput:&lt;/p>
&lt;pre tabindex="0">&lt;code>2× H100 SXM (all in one) → ~70,000 USD capex, ~7 USD/h
&lt;/code>&lt;/pre>&lt;p>The same throughput at a fraction of the capex and a quarter of the hourly cost, &lt;strong>at the price of operational complexity&lt;/strong>: you now have two pools to coordinate, a transfer network to look after, and a scheduler that is not trivial.&lt;/p>
&lt;p>For larger models (Llama 3 70B), the decode pool no longer fits on a single 4090 (the model does not fit in 24 GB, not even quantised to INT4 with headroom). There the sensible mix is H100 for prefill plus L40S or A100 80GB for decode, with a typical saving of 30-40 % over the all-H100 option.&lt;/p>
&lt;h2 id="applied-to-typical-on-premise-hardware">Applied to typical on-premise hardware&lt;/h2>
&lt;h3 id="case-1--one-or-two-rtx-4090s-monolithic-still-wins">Case 1 — One or two RTX 4090s: monolithic still wins&lt;/h3>
&lt;p>With a single GPU there is no disaggregation to speak of: the pattern needs at least two GPUs in separate pods. With two 4090s you can technically try it (one for prefill, one for decode with the KV cache transferred over PCIe 5 or basic RDMA), but the transfer overhead eats the gain for small models where prefill is already fast.&lt;/p>
&lt;p>&lt;strong>Recommendation:&lt;/strong> stay monolithic (traditional vLLM, &lt;a href="https://blog.lo0.es/en/posts/kv-cache-working-memory-llm-inference/">properly configured with a quantised KV cache&lt;/a>). The next justifiable level of complexity is a cluster with a fast interconnect.&lt;/p>
&lt;h3 id="case-2--4h100-sxm-cluster-320-gb-nvlink-the-sweet-spot">Case 2 — 4×H100 SXM cluster (320 GB, NVLink): the sweet spot&lt;/h3>
&lt;p>The minimum realistic configuration for serious disaggregation, serving a 70B model in production:&lt;/p>
&lt;pre tabindex="0">&lt;code>2× H100 (TP=2) → 2 prefill pods
2× H100 (TP=2) → decode pods with several instances sharing TP
NIXL over NVLink → KV cache transfer &amp;lt;6 ms
Router (vLLM or Dynamo) → prompt distribution and streaming
&lt;/code>&lt;/pre>&lt;p>Realistic expected result: goodput &lt;strong>1.6-1.9× relative to the same cluster running monolithic&lt;/strong>, with TTFT stable up to loads of QPS 7-8 (against the QPS 4 at which the monolithic setup starts to degrade).&lt;/p>
&lt;p>If the heterogeneous mix is possible (adding 4-8 L40S to the cluster to make the decode pool), the cost per token drops a further 25 % to 35 %, while still serving the 70B model whole.&lt;/p>
&lt;h2 id="position-within-the-architecture">Position within the architecture&lt;/h2>
&lt;p>Disaggregated serving is a &lt;strong>cross-cutting layer&lt;/strong> over almost everything discussed in previous articles. It touches:&lt;/p>
&lt;ul>
&lt;li>The &lt;a href="https://blog.lo0.es/en/posts/kv-cache-working-memory-llm-inference/">KV cache&lt;/a> because it is the artefact transferred between pods. Without a solid grasp of how much the cache weighs and how it grows with context, you cannot size the transfer.&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/continuous-fine-tuning-production-real-traffic-deployed-adapter/">Continuous fine-tuning&lt;/a> because multi-LoRA hot-swap keeps its semantics: each pod (prefill or decode) loads the adapters separately, and the router decides which adapter to apply in each phase.&lt;/li>
&lt;li>Cluster topology: it changes the recommended HW, the networking required and the cost model.&lt;/li>
&lt;/ul>
&lt;p>If you are designing an inference infrastructure for 2026 from scratch, &lt;strong>disaggregation stops being optional&lt;/strong> for any cluster beyond 4 GPUs of capacity. If you are modernising an existing one, it is the upgrade with the best return per euro invested, provided the networking between pods is decent (intra-node NVLink or intra-rack RDMA as a minimum).&lt;/p>
&lt;h2 id="what-we-have-not-covered-upcoming-articles">What we have not covered (upcoming articles)&lt;/h2>
&lt;ul>
&lt;li>&lt;strong>NIXL in detail&lt;/strong>: how it picks the optimal transport, how UCX is configured, what happens when RDMA fails and you have to fall back to TCP.&lt;/li>
&lt;li>&lt;strong>Routing scheduler&lt;/strong>: how the orchestrator decides which pod gets which request, dynamic batching, priority handling.&lt;/li>
&lt;li>&lt;strong>Multi-tenant disagg&lt;/strong>: KV cache isolation between tenants, per-adapter ACLs, multi-LoRA over specialised pods.&lt;/li>
&lt;li>&lt;strong>Disagg + prefix caching&lt;/strong>: how it combines with the KV cache reuse pattern when several prompts share a prefix (a common system prompt).&lt;/li>
&lt;li>&lt;strong>Disagg at the edge / local inference&lt;/strong>: viability on home hardware (4090 + Mac Studio, for example), where the transfer depends on Thunderbolt or residential Ethernet.&lt;/li>
&lt;/ul>
&lt;h2 id="see-also">See also&lt;/h2>
&lt;ul>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/six-stage-llmops-pipeline-architecture-and-deep-dive/">The six-stage LLMOps pipeline&lt;/a> — the master map the Deploy stage belongs to. This post digs into one concrete architectural decision within that stage.&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/gpu-cluster-as-multi-tenant-platform/">The GPU cluster as a multi-tenant platform&lt;/a> — the Gateway/Quota/Isolation/Observability layered pattern on top of which the disaggregation described here sits: the H100 cluster serving several tenants combines both patterns.&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/llm-inference-operators-kubernetes/">LLM inference operators on Kubernetes&lt;/a> — the operators (vLLM Production Stack, NVIDIA Dynamo, llm-d, OME) that materialise the specialised prefill and decode pods in Kubernetes.&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/kv-cache-working-memory-llm-inference/">KV cache: the working memory that holds up LLM inference&lt;/a> — the exact artefact transferred between pods, with the full formula for its size.&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/pagedattention-vllm-block-manager/">PagedAttention from the inside: blocks, page table, eviction and the state of the art of KV cache in 2026&lt;/a> — the KV cache mechanics that disaggregation exploits at block level, and the landscape of derived optimisations (vAttention, LMCache, RadixAttention).&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/continuous-fine-tuning-production-real-traffic-deployed-adapter/">Continuous fine-tuning in production&lt;/a> — how multi-LoRA hot-swap coexists with disaggregation: each pod loads adapters separately, the router chooses.&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/quantization-llm-inference-fp8-int4-gguf/">Quantization for LLM inference: FP8, INT4 and GGUF&lt;/a> — the two pools (prefill and decode) can be quantised asymmetrically: prefill keeps more precision, decode prioritises throughput. The maths and the formats are there.&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/speculative-decoding-fundamentals-maths-state-of-play/">Speculative decoding: the secretary who anticipates what the boss is going to say&lt;/a> — speculative only helps in the decode phase (it does not touch prefill); disaggregation makes it easier by isolating the decode pool where the technique can be applied without contaminating the prefill one.&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/flashattention-librarian-io-awareness-async-blackwell-asymmetry/">FlashAttention v1/v2/v3/v4: the librarian who never clears the desk&lt;/a> — the kernel each pod uses underneath. Prefill (compute-bound) and decode (memory-bound) benefit from FA3/FA4 in different ways and allow a backend to be chosen per phase.&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/moe-inference-fundamentals-expert-parallel-deepseek-economics/">MoE inference: the call centre with 256 specialists&lt;/a> — the real DeepSeek-V3 deployment combines &lt;strong>EP=32 in prefill (4 nodes) with EP=144 in decode (18 nodes)&lt;/strong>: disaggregation is the prerequisite that allows expert parallelism to be specialised per phase.&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/multi-lora-serving-shared-base-concurrent-adapters-sgmv-kernel/">Multi-LoRA serving: the single translator with a thousand glossaries&lt;/a> — once pods are separated, adapters are managed per pool; the 2026 strategy is to replicate hot ones on every pod (prefill and decode) and evict cold ones.&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/continuous-batching-orca-vllm-chunked-prefill-goodput/">Continuous batching&lt;/a> — the layer underneath. DistServe is the paper that contributed the goodput metric and the idea of disaggregating prefill/decode; understanding the iterative scheduler is a prerequisite to understanding why the separation unlocked additional gains.&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/capacity-planning-on-premise-llm-inference/">Capacity planning for on-premise LLM inference&lt;/a> — disaggregation appears as the third sizing lever when the workload&amp;rsquo;s prefill/decode mix is asymmetric; when to apply it and how much it saves are quantified there.&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/nvlink-nvswitch-nccl-cable-every-token-crosses/">NVLink, NVSwitch and NCCL: the cable every token travels down&lt;/a> — moving the KV cache between the prefill pool and the decode pool travels over the same interconnect as the all-reduces and competes with them; designing the disaggregation without counting that transfer cost is the classic trap.&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/network-numa-cilium-ebpf-dranet-fourth-leg-pinning/">The kitchen door the maître never looked at: network NUMA, Cilium eBPF and DRANET&lt;/a> — when that KV cache crosses by RDMA across nodes, a badly placed NIC pays for it in latency; the fourth leg (NIC↔GPU locality via DRANET) is what keeps separating prefill and decode from being expensive in transfer.&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/pantry-lift-from-disk-to-hbm-why-the-kitchen-opens-late/">From disk to HBM: cold start and model loading&lt;/a> — bringing up decode pools on demand pays the cold start of loading the model into every new pod; the elasticity of the pattern depends on how fast they start.&lt;/li>
&lt;li>&lt;a href="https://blog.lo0.es/en/posts/sms-cuda-streams-cuda-graphs-inference/">SM, CUDA streams and CUDA graphs&lt;/a> — pure decode pods are the ideal case for &lt;code>FULL_DECODE_ONLY&lt;/code>: they maximise the benefit of the CUDA graph in the most launch-bound phase.&lt;/li>
&lt;/ul>
&lt;h2 id="references">References&lt;/h2>
&lt;ul>
&lt;li>Zhong et al., &lt;em>DistServe: Disaggregating Prefill and Decoding for Goodput-optimized Large Language Model Serving&lt;/em> (OSDI 2024).&lt;/li>
&lt;li>Patel et al., &lt;em>SplitWise: Efficient Generative LLM Inference Using Phase Splitting&lt;/em> (ISCA 2024).&lt;/li>
&lt;li>NVIDIA, &lt;em>NVIDIA Dynamo 1.0: Production-Ready Disaggregated Inference&lt;/em> (GTC 2026, March): &lt;a href="https://developer.nvidia.com/blog/nvidia-dynamo-1-production-ready/">https://developer.nvidia.com/blog/nvidia-dynamo-1-production-ready/&lt;/a>.&lt;/li>
&lt;li>NVIDIA, &lt;em>NIXL: NVIDIA Inference Transfer Library&lt;/em> — official documentation.&lt;/li>
&lt;li>vLLM, &lt;em>Disaggregated Prefilling&lt;/em>: &lt;a href="https://docs.vllm.ai/en/stable/features/disagg_prefill/">https://docs.vllm.ai/en/stable/features/disagg_prefill/&lt;/a>.&lt;/li>
&lt;li>vLLM, &lt;em>NixlConnector Usage Guide&lt;/em>: &lt;a href="https://docs.vllm.ai/en/stable/features/nixl_connector_usage/">https://docs.vllm.ai/en/stable/features/nixl_connector_usage/&lt;/a>.&lt;/li>
&lt;li>Hao AI Lab, &lt;em>Disaggregated Inference: 18 Months Later&lt;/em> (UCSD, 2025) — technical retrospective on the DistServe paper.&lt;/li>
&lt;/ul></description></item></channel></rss>